USB type-C cable and method for reading/writing a chip in a USB type-C cable

Abstract

A method for reading/writing a chip in a USB type-C cable comprises converting a read/write command into unstructured vendor defined message (UVDM) that is conforming to a USB power delivery specification. Such UVDM will be delivered to the chip via a type-C configuration channel interface. The chip analyzes the UVDM to acquire the read/write command and reads or modifies the content of a non-volatile memory in the chip according to the read/write command. Due to use of the type-C configuration channel interface, which is inherent in the USB type-C cable, to read/write the chip, it needs no extra interface which otherwise increases costs.

Claims

1. A USB type-C cable, comprising: a chip configured such that a type-C configuration channel interface will be established between the chip and a writer when the type-C cable is connected to the writer, the chip including: a non-volatile memory; and a controller connected to the non-volatile memory and configured to operably analyze a first unstructured vendor defined message (UVDM) that is conforming to a USB power delivery specification to acquire a read/write command after receiving the first UVDM from the writer via the type-C configuration channel interface and read/write the non-volatile memory according to the read/write command.

2. The USB type-C cable of claim 1, wherein, when the chip reads data in the non-volatile memory according to the read/write command, the chip will converts the read data to a second UVDM that is conforming to the USB power delivery specification and send the second UVDM via the type-C configuration channel interface.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) These and other objectives, features and advantages of the present invention will become apparent to those skilled in the art upon consideration of the following description of the preferred embodiments according to the present invention taken in conjunction with the accompanying drawings, in which:

(2) FIG. 1 shows a conventional method that utilizes a writer to modify a non-volatile memory in a chip of a USB type-C cable;

(3) FIG. 2 illustrates a method for reading/writing a chip in a USB type-C cable;

(4) FIG. 3 shows a controlling procedure for writing a trim register;

(5) FIG. 4 shows a controlling procedure for writing a user page register; and

(6) FIG. 5 shows a controlling procedure for reading a trim register or a user page register.

DETAILED DESCRIPTION OF THE INVENTION

(7) A type-C configuration channel interface of a USB type-C cable can deliver a packet command set that conforms to a USB power delivery (PD). The present invention utilizes an unstructured vendor defined message (UVDM) in the packet command set to command a controller 10 to read/write a non-volatile memory 12. Accordingly, a chip 4 needs no extra communication protocol of specific interface as well as needs no extra costs.

(8) FIG. 2 illustrates a method for reading/writing the chip 4 in the USB type-C cable 56. When a type-C connector 54 of a writer 2 is connected to a type-C plug 58 of the type-C cable 56, a type-C configuration channel interface 60 will be established between the writer 2 and a type-C interface pin 7 of the chip 4 in the USB type-C cable 56. A host 50 sends a read/write command to the writer 2 via an I.sup.2C interface 52. The read/write command includes a command to write to all sections of the non-volatile memory 12, a command to write to an open section of the non-volatile memory 12, a command to write to a non-open section of the non-volatile memory 12, or a command to read a data from the non-volatile memory 12. After the writer 2 converts the received read/write command into the UVDM that conforms to the USB PD specification, the writer 2 will send the UVDM to the chip 4 in the USB type-C cable 56 via the type-C configuration channel interface 60. The controller 10 of the chip 4 analyzes the received UVDM to acquire the correspondent read/write command. Thereafter, the controller 10 writes data into an address of a specific section of the non-volatile memory 12 or reads a data from an address of a specific section of the non-volatile memory 12 according to the read/write command. If the read/write command is a command for reading the data from the address of the specific section, the chip 4 will convert the read data into another UVDM that conforms to the USB PD specification and sends the another UVDM to the writer 2 via the type-C configuration channel interface 60.

(9) The content of the UVDM can be decided by the vendor according to the practical needs. The UVDM is widely utilized. The present invention provides several common UVDM as examples. Referring to Table 1 to Table 8 as follows, every UVDM includes a header, a vendor defined message (VDM) header, and at least one vendor defined data object (VDO). In the UVDM, the content VDMType=UVDM in the column VDM HDR is fixed, but other content in the tables can be modified according to the practical needs.

(10) TABLE-US-00001 TABLE 1 ENTER TEST MODE UVDM HEADER VDM HEADER VDO1 VDO2 OBJ_NUM=TMCODE VID=dedicated VID TESTCODE1 TESTCODE2 VDMType=UVDM CMDType=TMCODE

(11) TABLE-US-00002 TABLE 2 WRITE TRIM REGISTER UVDM HEADER VDM HEADER VDO1 VDO2 VDO3 VDO4 OBJ_NUM=WTRIM VID=dedicated VID REG33~ REG37~ REG3B~ REG3F~ REG30 REG34 REG38 REG3C VDMType=UVDM CMDType=WTRIM

(12) TABLE-US-00003 TABLE 3 WRITE USER PAGE1 REGISTER UVDM HEADER VDM HEADER VDO1 VDO2 VDO3 VDO4 OBJ_NUM=WUSER1 VID=dedicated VID REG3~ REG7~ REGB~ REGF~ REG0 REG4 REG8 REGC VDMType=UVDM CMDType=WUSER1

(13) TABLE-US-00004 TABLE 4 WRITE USER PAGE2 REGISTER UVDM HEADER VDM HEADER VDO1 VDO2 VDO3 VDO4 OBJ_NUM=WUSER2 VID=dedicated VID REG13~ REG17~ REG1B~ REG1F~ REG10 REG14 REG18 REG1C VDMType=UVDM CMDType=WUSER2

(14) TABLE-US-00005 TABLE 5 WRITE USER PAGE3 REGISTER UVDM HEADER VDM HEADER VDO1 VDO2 VDO3 VDO4 OBJ_NUM=WUSER3 VID=dedicated VID REG23~ REG27~ REG2B~ REG2F~ REG20 REG24 REG28 REG2C VDMType=UVDM CMDType=WUSER

(15) TABLE-US-00006 TABLE 6 TRIGGER MTP WRITE UVDM HEADER VDM HEADER Command (CMD) VDO OBJ_NUM=WR VID=dedicated VID {RREG_ALL, RMTP_ALL, WMTP_ALL} VDMType=UVDM {WMTP_TRIM, WMTP_USER, RDADDR} CMDType=WRCMD

(16) TABLE-US-00007 TABLE 7 MTP READ UVDM HEADER VDM HEADER CMD VDO OBJ_NUM=RD VID=dedicated VID {RREG_ALL, RMTP_ALL, WMTP_ALL} VDMType=UVDM {WMTP_TRIM, WMTP_USER, RDADDR} CMDType=RDCMD

(17) TABLE-US-00008 TABLE 8 EXIT TESTMODE UVDM HEADER VDM HEADER OBJ_NUM=EXITTM VID=dedicated VID VDMType=UVDM CMDType=EXITTM

(18) FIGS. 3 to 5 show some controlling procedures between the writer 2 and the chip 4 inside the type-C cable.

(19) FIG. 3 shows the controlling procedure for writing a trim register. First, the writer 2 sends an ENTER TEST MODE UVDM 14 to the chip 4 inside the type-C cable, so that the chip 4 enters a test mode. After the chip 4 receives the ENTER TEST MODE UVDM 14, a confirmation code (GoodCRC) 16 will be sent back to the writer 2. After the writer 2 receives the confirmation code 16, a WRITE TRIM REGISTER UVDM 18 will be sent to the chip 4 so as to instruct an address of the non-volatile memory that is to be written. After the chip 4 receives the WRITE TRIM REGISTER UVDM 18, a confirmation code (GoodCRC) 20 will be sent back to the writer 2. After the writer 2 receives the confirmation code 20, a TRIGGER MTP WRITE UVDM 22 will be sent to the chip 4. After the chip 4 receives the TRIGGER MTP WRITE UVDM 22, a confirmation code (GoodCRC) 24 will be sent to the writer 2. Then, the chip 4 will start executing a write operation of the non-volatile memory.

(20) FIG., 4 shows the controlling procedure for writing a user page register. First, the writer 2 sends an ENTER TEST MODE UVDM 26 to the chip 4, so that the chip 4 enters a test mode. After the chip 4 receives the ENTER TEST MODE UVDM 26, a confirmation code (GoodCRC) 28 will be sent back to the writer 2. After the writer 2 receives the confirmation code 28, a WRITE USER PAGE REGISTER UVDM 30 will be sent to the chip 4 so as to instruct the address of the non-volatile memory that is to be written. After the chip 4 receives the WRITE USER PAGE REGISTER UVDM 30, a confirmation code (GoodCRC) 32 will be sent back to the writer 2. After the writer 2 receives the confirmation code 32, a TRIGGER MTP WRITE UVDM 34 will be sent to the chip 4. After the chip 4 receives the TRIGGER MTP WRITE UVDM 34, a confirmation code (GoodCRC) 36 will be sent to the writer 2. Then, the chip 4 will start executing a write operation of the non-volatile memory.

(21) FIG. 5 shows the controlling procedure for reading a trim register or a user page register. First, the writer 2 sends an ENTER TEST MODE UVDM 38 to the chip 4, so that the chip 4 enters the test mode. After the chip 4 receives the ENTER TEST MODE UVDM 38, a confirmation code (GoodCRC) 40 will be sent back to the writer 2. After the writer 2 receives the confirmation code 40, a READ TRIM REGISTER OR USER TRIM UVDM 42 will be sent to the chip 4 so as to instruct the address of the non-volatile memory that is to be read. After the chip 4 receives the READ TRIM REGISTER OR USER TRIM UVDM 42, a confirmation code (GoodCRC) 44 will be sent back to the writer 2. Then, the chip 4 converts the read data into a READ REGISTER RETUEN UVDM 46 to the writer 2. After the writer 2 receives the READ REGISTER RETURN UVDM 46, a confirmation code (GoodCRC) 48 will be sent back to the chip 4.

(22) While the present invention has been described in conjunction with preferred embodiments thereof, it is evident that many alternatives, modifications and variations will be apparent to those skilled in the art. Accordingly, it is intended to embrace all such alternatives, modifications and variations that fall within the spirit and scope thereof as set forth in the appended claims.