A method of manufacturing a semiconductor device includes performing one or more grinding processes on a backside surface of a device wafer to thin the device wafer from a first thickness to a second thickness. A first chemical mechanical polish (CMP) process is performed on the backside surface of the device wafer to thin the device wafer from the second thickness to a third thickness. A second CMP process is performed on the backside surface of the device wafer to selectively remove device wafer material that is disposed over an active device area of the semiconductor device, where a removal rate of the device wafer material is a function of depth.

A semiconductor device and a method of fabricating the semiconductor device are disclosed. The method includes: providing a device wafer and a carrier wafer, the device wafer including an SOI substrate comprising, stacked from the bottom upward, a lower substrate, a buried insulator layer and a semiconductor layer; bonding the device wafer at a front side thereof to the carrier wafer; removing at least the lower substrate through thinning the device wafer from a backside thereof, wherein the backside of the device wafer opposes the front side thereof; and providing a high-resistance substrate and bonding the device wafer at the backside thereof to the high-resistance substrate, the high-resistance substrate having a resistivity higher than that of the lower substrate. With the present disclosure, lower signal loss and improved signal linearity can be achieved while avoiding a significant cost increase.

A substrate has a front side including an electrical circuit and a rear side including an exposed zone that faces the electrical circuit. In an electrochemical treatment step, an electrical potential is laterally applied at least to the exposed zone of the rear side of the substrate, while the exposed zone is in contact with a chemically reactive substance. The electrical potential causes a lateral flow of electrical current at least in the exposed zone of the substrate. The lateral flow of current and the chemically reactive substance alter the substrate in at least the exposed zone.

Provided is a method for manufacturing a semiconductor silicon wafer capable of inhibiting P-aggregation defects (Si-P defects) and SF in an epitaxial layer. The method includes a step of forming a silicon oxide film with a thickness of at least 300 nm or thicker only on the backside of the silicon wafer substrate by the CVD method at a temperature of 500° C. or lower after the step of forming the silicon oxide film, a step of heat treatment where the substrate is kept in an oxidizing atmosphere at a constant temperature of 1100° C. or higher and 1250° C. or lower for 30 minutes or longer and 120 minutes or shorter after the heat treatment, a step of removing surface oxide film formed on the front surface of the substrate, and a step of depositing a silicon monocrystalline epitaxial layer on the substrate after the step of removing the surface oxide film.

A Chemical Mechanical Polishing, CMP, process applied to a wafer of Silicon Carbide having a thickness of, or lower than, 200 μm, comprising the steps of: arranging the wafer on a supporting head of a CMP processing apparatus, the wafer having a front side and a back side opposite to one another, the front side housing at least one electronic component and being coupled to the supporting head; deliver a polishing slurry on the wafer, wherein the polishing slurry has a pH in the range 2-3; pressing the back side of the wafer against a polishing pad of the CMP apparatus exerting, by the supporting head, a pressure on the polishing pad in the range 5-20 kPa; setting a rotation of the polishing pad in the range 30-180 rpm, and setting a rotation of polishing head in the range 30-180 rpm; setting and maintaining a CMP process temperature equal to, or below, 50° C.

Methods of processing a substrate having one side and an opposite side include providing a protective film having a front surface and a back surface, and applying a water-soluble material to at least a central area of the front surface of the protective film and/or applying a water-soluble material to at least a central portion of the one side of the substrate. The protective film is applied to the one side of the substrate, wherein the front surface of the protective film faces the one side of the substrate and no adhesive is between at least the central area of the front surface of the protective film and the one side of the substrate. An external stimulus is applied to the protective so that the protective film is attached to the one side of the substrate, and the substrate can be processed.

In certain aspects, a method for controlling wafer stress is disclosed. A semiconductor film is formed on a backside of a wafer. The wafer is deformed by stress associated with a front-side semiconductor structure on a front side of the wafer opposite to the backside of the wafer. A laser application region of the semiconductor film is determined. A laser anneal process is performed in the laser application region of the semiconductor film.

A method of cleaning and polishing a backside surface of a semiconductor wafer is provided. The method includes placing an abrasive brush, comprising an abrasive tape wound around an outer surface of a brush member of the abrasive brush, on the backside surface of the semiconductor wafer. The method also includes rotating the brush member to polish the backside surface of the semiconductor wafer by abrasive grains formed on the abrasive tape and to clean the backside surface of the semiconductor wafer by the brush member which is not covered by the abrasive tape.

The invention relates to a method of processing a semiconductor in the semiconductor wafer is disposed on a susceptor in a coating apparatus and processed, wherein an etching gas is passed through the coating apparatus in an etching step. The invention further relates to a control system for controlling a coating apparatus for processing a semiconductor water, to a plant for processing a semiconductor wafer having a coating apparatus which comprises the control system, and a semiconductor wafer. A first side of the semiconductor wafer which has been subjected to a polishing operation by CMP, or a second side of the semiconductor wafer opposite the first side, is coated with a protective layer before processing.

The invention relates to methods of processing a wafer, having on one side a device area with a plurality of devices. In particular, the invention relates to a method which comprises providing a protective film, and applying the protective film to the side of the wafer being opposite to the one side, so that at least a central area of a front surface of the protective film is in direct contact with the side of the wafer being opposite to the one side. The method further comprises applying an external stimulus to the protective film during and/or after applying the protective film to the side of the wafer being opposite to the one side, so that the protective film is attached to the side of the wafer being opposite to the one side, and processing the one side of the wafer and/or the side of the wafer being opposite to the one side.