In one embodiment, a semiconductor device includes a stacked film alternately including a plurality of electrode layers and a plurality of insulating layers. The device further includes a first insulator, a charge storage layer, a second insulator and a first semiconductor layer that are disposed in order in the stacked film. The device further includes a plurality of first films disposed between the first insulator and the plurality of insulating layers. Furthermore, at least one of the first films includes a second semiconductor layer.

Provided is a method of SiC wafer processing, and the method includes the following steps. A SiC wafer is provided, and the SiC wafer has a first surface and an opposing second surface. A fine grinding process is performed on the first surface and the second surface of the SiC wafer. A dry etching process is performed on the first surface and the second surface of the SiC wafer to make the roughness of the first surface and the second surface 2.5 nm or less. After the dry etching process, a polishing process is performed on the first surface and the second surface of the SiC wafer.

The present disclosure relates to a method for forming a cavity that traverses a stack of layers including a bottom layer, a first portion of which locally presents an excess thickness, the method comprising a first step of non-selective etching and a second step of selective etching vertically in line with the first portion.

A method for preparing a semiconductor device structure includes forming a target layer over a semiconductor substrate, and forming a plurality of first energy-sensitive patterns over the target layer. The method also includes forming a lining layer conformally covering the first energy-sensitive patterns. A first opening is formed over the lining layer and between the first energy-sensitive patterns. The method further includes filling the first opening with a second energy-sensitive pattern, and performing an etching process to form a plurality of second openings and a third opening in the target layer, wherein the third opening is between the second openings, and the second openings and the third opening have different depths.

Provided is a method for manufacturing a component arrangement for a package, including providing a wafer made of a semiconductor material having a polished wafer surface; forming an opening in the wafer by anisotropic etching, wherein an anisotropically etched surface is manufactured near the opening; separating a component from the anisotropically etched wafer, wherein the separated component is manufactured having the following surfaces: an optical surface formed near a surface portion of the polished wafer surface and a mounting surface formed in the region of the anisotropically etched surface; and mounting the separated component on a substrate surface of a carrier substrate using the mounting surface in such a manner that the anisotropically etched surface is bonded to the substrate surface, wherein the optical surface is arranged as an inclined exposed surface. Furthermore, a component arrangement and a package are provided having a component arrangement.

A semiconductor device and a method of fabricating the semiconductor device are disclosed. The method includes: providing a device wafer and a carrier wafer, the device wafer including an SOI substrate comprising, stacked from the bottom upward, a lower substrate, a buried insulator layer and a semiconductor layer; bonding the device wafer at a front side thereof to the carrier wafer; removing at least the lower substrate through thinning the device wafer from a backside thereof, wherein the backside of the device wafer opposes the front side thereof; and providing a high-resistance substrate and bonding the device wafer at the backside thereof to the high-resistance substrate, the high-resistance substrate having a resistivity higher than that of the lower substrate. With the present disclosure, lower signal loss and improved signal linearity can be achieved while avoiding a significant cost increase.

A ratio obtained by dividing a number of pits by a number of screw dislocations is equal to or smaller than 1%. The first main surface has a surface roughness equal to or smaller than 0.15 nm. An absolute value of a difference between the first wave number and the second wave number is equal to or smaller than 0.2 cm.sup.−1, and an absolute value of a difference between the first full width at half maximum and the second full width at half maximum is equal to or smaller than 0.25 cm.sup.−1.

An etching method includes preparing a substrate in which titanium nitride and molybdenum or tungsten are present, and etching the titanium nitride by supplying a processing gas including a ClF.sub.3 gas and a N.sub.2 gas to the substrate, wherein in the etching the titanium nitride, a partial pressure ratio of the ClF.sub.3 gas to the N.sub.2 gas in the processing gas is set to a value at which grain boundaries of the molybdenum or the tungsten are nitrided to such an extent that generation of a pitting is suppressed.

A method including: a step of preparing a substrate that includes a first layer having a first principal surface provided with a dicing region, and a mark, and a second principal surface, and includes a semiconductor layer; a step of covering a first region corresponding to the mark on the second principal surface, with a resist film; a step of forming a metal film on the second principal surface; a step of removing the resist film, to expose the semiconductor layer corresponding to the first region; a step of imaging the substrate, with a camera, to detect a position of the mark through the semiconductor layer, and calculating a second region corresponding to the dicing region on a surface of the metal film; and a step of irradiating a laser beam to the second region, to remove the metal film and expose the semiconductor layer corresponding to the second region.

A method of producing a silicon wafer includes: a laser mark printing step of printing a laser mark having a plurality of dots on a silicon wafer; an etching step of performing etching on at least a laser-mark printed region in a surface of the silicon wafer; and a polishing step of performing polishing on both surfaces of the silicon wafer having been subjected to the etching step. In the laser mark printing step, each of the plurality of dots is formed by a first step of irradiating a predetermined position on a periphery of the silicon wafer with laser light of a first beam diameter thereby forming a first portion of the dot and a second step of irradiating the predetermined position with laser light of a second beam diameter that is smaller than the first beam diameter thereby forming a second portion of the dot.