A fully-differential two-stage operational amplifier circuit is provided, and it includes a first-stage amplification circuit, a second-stage amplification circuit, a common-mode signal acquisition circuit, a common-mode feedback circuit and a bias circuit. The first-stage amplification circuit has a telescopic structure and receives differential input signals IN.sub.P and IN.sub.N. The second-stage amplification circuit has a common-source structure and outputs differential output signals OUT.sub.P and OUT.sub.N. The common-mode signal acquisition circuit receives differential output signals, and outputs an operational amplifier output common-mode signal V.sub.CMO. The common-mode feedback circuit outputs common-mode feedback signals VB.sub.1 and VB.sub.2 to the first-stage amplifier circuit and the second-stage amplifier circuit respectively; The bias circuit outputs a bias voltage VB.sub.3 to the first-stage amplifier circuit, and outputs bias voltages VB.sub.4 and VB.sub.5 to the first-stage amplifier circuit respectively.

A circuit includes a first amplifier having first and second inputs and first and second output, first and second input capacitors, a first feedback capacitor selectively coupled between the first input and the first output, and a second feedback capacitor selectively coupled between the second input and the second output. During a second phase of operation, the first and second feedback capacitors are decoupled from the output and the first amplifier is configured to sample an input common mode voltage, an output common mode voltage, and an input offset voltage of the first amplifier on the first and second input capacitors. During a first phase of operation, the first feedback capacitor is coupled between the input and the output, the second feedback capacitor is coupled between the input and the output, and the first amplifier is configured to amplify a differential input signal provided across the first and second inputs.

A circuit includes a first amplifier having first and second inputs and first and second output, first and second input capacitors, a first feedback capacitor selectively coupled between the first input and the first output, and a second feedback capacitor selectively coupled between the second input and the second output. During a second phase of operation, the first and second feedback capacitors are decoupled from the output and the first amplifier is configured to sample an input common mode voltage, an output common mode voltage, and an input offset voltage of the first amplifier on the first and second input capacitors. During a first phase of operation, the first feedback capacitor is coupled between the input and the output, the second feedback capacitor is coupled between the input and the output, and the first amplifier is configured to amplify a differential input signal provided across the first and second inputs.

A differential signal generation circuit is provided. A PMOS transistor pair provides a first current to a current modulator circuit. A first current control circuit is coupled to the PMOS transistor pair in parallel. When the PMOS transistor pair is turned off, the first current control circuit provides the first current to the current adjustment circuit. An NMOS transistor pair provides a second current to the current modulator circuit. A second current control circuit is coupled to the NMOS transistor pair in parallel. When the NMOS transistor pair is turned off, the second current control circuit provides the second current to the current modulator circuit. The current modulator circuit sets the static current of a first output terminal to be equal to the static current of a second output terminal.