H03F3/45654

Fully-differential two-stage operational amplifier circuit

A fully-differential two-stage operational amplifier circuit is provided, and it includes a first-stage amplification circuit, a second-stage amplification circuit, a common-mode signal acquisition circuit, a common-mode feedback circuit and a bias circuit. The first-stage amplification circuit has a telescopic structure and receives differential input signals IN.sub.P and IN.sub.N. The second-stage amplification circuit has a common-source structure and outputs differential output signals OUT.sub.P and OUT.sub.N. The common-mode signal acquisition circuit receives differential output signals, and outputs an operational amplifier output common-mode signal V.sub.CMO. The common-mode feedback circuit outputs common-mode feedback signals VB.sub.1 and VB.sub.2 to the first-stage amplifier circuit and the second-stage amplifier circuit respectively; The bias circuit outputs a bias voltage VB.sub.3 to the first-stage amplifier circuit, and outputs bias voltages VB.sub.4 and VB.sub.5 to the first-stage amplifier circuit respectively.

Amplification interface, and corresponding measurement system and method for calibrating an amplification interface

A thermally-isolated-metal-oxide-semiconducting (TMOS) sensor has inputs coupled to first and second nodes to receive first and second bias currents, and an output coupled to a third node. A tail has a first conduction terminal coupled to the third node and a second conduction terminal coupled to a reference voltage. A control circuit applies a control signal to a control terminal of the tail transistor based upon voltages at the first and second nodes so that a common mode voltage at the first and second nodes is equal to a reference common mode voltage. A differential current integrator has a first input terminal coupled to the second node and a second input terminal coupled to the first node, and provides an output voltage indicative of an integral of a difference between a first output current at the first input terminal and a second output current at the second input terminal.

POST DRIVER HAVING VOLTAGE PROTECTION
20230208371 · 2023-06-29 ·

A post driver includes an input pair circuit, a protection circuit, a common mode sensing circuit and an amplifier. The input pair circuit outputs a first signal through a first node and outputs a second signal through a second node according to a first input signal and a second input signal. The protection circuit provides the input pair circuit with voltage protection according to multiple first bias voltages and a second bias voltage, transmits the first signal to a first load to generate a first output signal, and transmits the second signal to a second load to generate a second output signal. The common mode sensing circuit senses a level of the first node and a level of the second node to generate a feedback signal. The amplifier generates the second bias voltage according to a reference signal and the feedback signal.

High-speed differential interface circuit with fast setup time
09824744 · 2017-11-21 · ·

A differential interface circuit includes a differential amplifier circuit, a common-mode feedback circuit and a feedback initialization circuit. The differential amplifier circuit is configured to receive and amplify a differential input signal so as to produce an amplified differential output signal. The common-mode feedback circuit is configured to estimate a common-mode level of the differential output signal, to produce a feedback value in response to the estimated common-mode level, and to adjust the differential amplifier circuit using the feedback value. The feedback initialization circuit is configured, in response to detecting that the differential input signal is in a range predefined as abnormal, to temporarily override the common-mode feedback circuit, and instead set the feedback value applied to the differential amplifier circuit to a predefined initialization value.

POWER AMPLIFIER USING MULTI-PATH COMMON-MODE FEEDBACK LOOP
20230246610 · 2023-08-03 ·

A power amplifier using multi-path common-mode feedback loops for radio frequency linearization is disclosed. In one aspect, a complementary metal oxide semiconductor (CMOS) power amplifier containing cascoded n-type field effect transistors (NFETs) and cascoded p-type FETs (PFETs) may have a common-mode feedback network and provides bias voltages that are dynamically varying with the signal power to keep the output common-mode fixed around a half-supply level, while the small-signal and large-signal transconductances of the FET's are kept balanced. A further feedback network may be associated with the supply voltage to assist in providing a symmetrical supply signal. The symmetrical supply signal allows for supply variations without introducing distortion for the power amplifier stage.

Miniaturized wideband active balun with controllable equalization
11290068 · 2022-03-29 · ·

Embodiments of active baluns are disclosed. In an embodiment, an active balun includes input terminals configured to receive a single-ended input signal and a linear redriver configured to transform the single-ended input signal into a differential output signal.

AMPLIFICATION INTERFACE, AND CORRESPONDING MEASUREMENT SYSTEM AND METHOD FOR CALIBRATING AN AMPLIFICATION INTERFACE

A thermally-isolated-metal-oxide-semiconducting (TMOS) sensor has inputs coupled to first and second nodes to receive first and second bias currents, and an output coupled to a third node. A tail has a first conduction terminal coupled to the third node and a second conduction terminal coupled to a reference voltage. A control circuit applies a control signal to a control terminal of the tail transistor based upon voltages at the first and second nodes so that a common mode voltage at the first and second nodes is equal to a reference common mode voltage. A differential current integrator has a first input terminal coupled to the second node and a second input terminal coupled to the first node, and provides an output voltage indicative of an integral of a difference between a first output current at the first input terminal and a second output current at the second input terminal.

Amplification interface, and corresponding measurement system and method for calibrating an amplification interface

An amplification interface includes a drain of a first FET connected to a first node, a drain of a second FET connected to a second node, and sources of the first and second FETs connected to a third node. First and second bias-current generators are connected to the first and second nodes. A third FET is connected between the third node and a reference voltage. A regulation circuit drives the gate of the third FET to regulate the common mode of the voltage at the first node and the voltage at the second node to a desired value. A current generator applies a correction current to the first and/or second node. A differential current integrator has a first and second inputs connected to the second and first nodes. The integrator supplies a voltage representing the integral of the difference between the currents received at the second and first inputs.

MINIATURIZED WIDEBAND ACTIVE BALUN WITH CONTROLLABLE EQUALIZATION
20210305947 · 2021-09-30 ·

Embodiments of active baluns are disclosed. In an embodiment, an active balun includes input terminals configured to receive a single-ended input signal and a linear redriver configured to transform the single-ended input signal into a differential output signal.

Inverse pseudo fully-differential amplifier having common-mode feedback control circuit

An inverse pseudo fully-differential amplifier having a common-mode feedback control circuit and a method for maintaining a stable output common-mode level are provided. The inverse pseudo fully-differential amplifier includes the pseudo fully-differential operation circuit and a common-mode feedback control circuit. The pseudo fully-differential operation circuit includes inverter amplifiers (2) and (3). The inverter amplifiers (2) and (3) respectively have a first feedback control terminal and a second feedback control terminal. Input terminals of the common-mode feedback control circuit are respectively connected with output terminals of the inverter amplifier (2) and (3), and are configured to detect common-mode output voltages of the inverter amplifier (2) and (3). An output terminal of the common-mode feedback control circuit is connected with the first feedback control terminal and the second feedback control terminal, and is configured to generate common-mode feedback to the inverter amplifiers (2) and (3) to maintain a stable common mode output level.